This thesis presents a generalized approach for the fully digital design and implementation
of chaos generators through the numerical solution of chaotic ordinary
differential equations. In particular, implementations use the Euler approximation
with a fixed-point twos complement number representation system for optimal hardware
and performance. In general, digital design enables significant benefits in terms
of power, area, throughput, reliability, repeatability and portability over analog implementations
of chaos due to lower process, voltage and temperature sensitivities and
easy compatibility with other digital systems such as microprocessors, digital signal
processing units, communication systems and encryption systems. Furthermore, this
thesis introduces the idea of implementing multidimensional chaotic systems rather
than 1-D chaotic maps to enable wider throughputs and multiplier-free architectures
that provide significant performance and area benefits.
This work focuses efforts on the well-understood family of autonomous 3rd order
"jerk" chaotic systems. The effect of implementation precision, internal delay cycles
and external delay cycles on the chaotic response are assessed. Multiplexing of parameters is implemented to enable switching between chaotic and periodic modes
of operation. Enhanced chaos generators that exploit long-term divergence in two
identical systems of different precision are also explored. Digital design is shown to
enable real-time controllability of 1D multiscroll systems and 4th order hyperchaotic
systems, essentially creating non-autonomous chaos that has thus far been difficult
to implement in the analog domain.
Seven different systems are mathematically assessed for chaotic properties, implemented
at the register transfer level in Verilog HDL and experimentally verified
on a Xilinx Virtex 4 FPGA. The statistical properties of the output are rigorously
studied using the NIST SP. 800-22 statistical testing suite. The output is adapted
for pseudo random number generation by truncating statistically defective bits. Finally,
a novel post-processing technique using the Fibonacci series is proposed and
implemented with a non-autonomous driven hyperchaotic system to provide pseudo
random number generators with high nonlinear complexity and controllable period
length that enables full utilization of all branches of the chaotic output as statistically
secure pseudo random output.
| Date of Award | May 2012 |
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| Original language | English (US) |
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| Awarding Institution | - Computer, Electrical and Mathematical Sciences and Engineering
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| Supervisor | Khaled Salama (Supervisor) |
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- Chaos
- Random Number Generation
- NIST
- nonlinear dynamics
- digital circuit
- field programmable gate array