Using reconfigurable multi-core architectures for safety-critical embedded systems

Tom Guillaumet; Aayush Sharma; Eric Feron; Madhava Krishna; Ranjani Narayan; Philippe Baufreton; Francois Neumann; Emmanuel Grolleau

doi:10.1109/DASC.2016.7777978

Using reconfigurable multi-core architectures for safety-critical embedded systems

Tom Guillaumet, Aayush Sharma, Eric Feron, Madhava Krishna, Ranjani Narayan, Philippe Baufreton, Francois Neumann, Emmanuel Grolleau

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

With the onset of multi- and many-core chips, the single-core market is closing down. Those chips constitute a new challenge for aerospace and safety-critical industries in general. Little is known about the certification of software running on these systems. There is therefore a strong need for developing software architectures based on multi-core architectures, yet compliant with safety-criticality constraints. This paper presents a reconfigurable multi-core architecture and the safety-criticality constraints for airborne systems. The last section uses the current certification guidance to explain how the architecture can satisfy these constraints even with dynamic features activated.

Original language	English (US)
Title of host publication	AIAA/IEEE Digital Avionics Systems Conference - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Print)	9781509056002
DOIs	https://doi.org/10.1109/DASC.2016.7777978
State	Published - Dec 7 2016
Externally published	Yes

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Generated from Scopus record by KAUST IRTS on 2021-02-18

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10.1109/DASC.2016.7777978

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@inproceedings{2cb2641e7d8745fda2b636893f2fe31a,

title = "Using reconfigurable multi-core architectures for safety-critical embedded systems",

abstract = "With the onset of multi- and many-core chips, the single-core market is closing down. Those chips constitute a new challenge for aerospace and safety-critical industries in general. Little is known about the certification of software running on these systems. There is therefore a strong need for developing software architectures based on multi-core architectures, yet compliant with safety-criticality constraints. This paper presents a reconfigurable multi-core architecture and the safety-criticality constraints for airborne systems. The last section uses the current certification guidance to explain how the architecture can satisfy these constraints even with dynamic features activated.",

author = "Tom Guillaumet and Aayush Sharma and Eric Feron and Madhava Krishna and Ranjani Narayan and Philippe Baufreton and Francois Neumann and Emmanuel Grolleau",

note = "Generated from Scopus record by KAUST IRTS on 2021-02-18",

year = "2016",

month = dec,

day = "7",

doi = "10.1109/DASC.2016.7777978",

language = "English (US)",

isbn = "9781509056002",

booktitle = "AIAA/IEEE Digital Avionics Systems Conference - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

}

TY - GEN

T1 - Using reconfigurable multi-core architectures for safety-critical embedded systems

AU - Guillaumet, Tom

AU - Sharma, Aayush

AU - Feron, Eric

AU - Krishna, Madhava

AU - Narayan, Ranjani

AU - Baufreton, Philippe

AU - Neumann, Francois

AU - Grolleau, Emmanuel

N1 - Generated from Scopus record by KAUST IRTS on 2021-02-18

PY - 2016/12/7

Y1 - 2016/12/7

N2 - With the onset of multi- and many-core chips, the single-core market is closing down. Those chips constitute a new challenge for aerospace and safety-critical industries in general. Little is known about the certification of software running on these systems. There is therefore a strong need for developing software architectures based on multi-core architectures, yet compliant with safety-criticality constraints. This paper presents a reconfigurable multi-core architecture and the safety-criticality constraints for airborne systems. The last section uses the current certification guidance to explain how the architecture can satisfy these constraints even with dynamic features activated.

AB - With the onset of multi- and many-core chips, the single-core market is closing down. Those chips constitute a new challenge for aerospace and safety-critical industries in general. Little is known about the certification of software running on these systems. There is therefore a strong need for developing software architectures based on multi-core architectures, yet compliant with safety-criticality constraints. This paper presents a reconfigurable multi-core architecture and the safety-criticality constraints for airborne systems. The last section uses the current certification guidance to explain how the architecture can satisfy these constraints even with dynamic features activated.

UR - http://ieeexplore.ieee.org/document/7777978/

UR - http://www.scopus.com/inward/record.url?scp=85009508262&partnerID=8YFLogxK

U2 - 10.1109/DASC.2016.7777978

DO - 10.1109/DASC.2016.7777978

M3 - Conference contribution

SN - 9781509056002

BT - AIAA/IEEE Digital Avionics Systems Conference - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Using reconfigurable multi-core architectures for safety-critical embedded systems

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