TY - JOUR
T1 - TEM Study of Current-Induced Domain Wall Motion in Cylindrical Nanowires: Towards 3D Magnetic Memory Devices
AU - Lopatin, Sergei
AU - Ivanov, Yurii P.
AU - Kosel, Jürgen
AU - Chuvilin, Andrey
N1 - KAUST Repository Item: Exported on 2021-03-08
PY - 2018/8/6
Y1 - 2018/8/6
N2 - Modern information storage technology strives toward realizing 3D devices. A very promising idea for 3D magnetic memory, called vertical race-track memory, proposed in 2008, was to manipulate information by utilizing current-driven domain wall (DW) motion in magnetic nanowires (NWs) [1]. Specifically, magnetic domains, separated by DWs, represent bits of information, whereas DW position
and motion (i.e. information storage and transfer) can be controlled by spin-polarized electric currents. The main challenge in realizing this idea comes from the standard micro-fabrication methods, which are highly effective for fabrication planar devices but very limited in capabilities when it comes to out-ofplane structures. One way to increase the memory density could be stacking of storage layers in a single
device. This complicates significantly the fabrication process even for a small number of layers. Hence, there is a need for efficient alternative fabrication concepts.
AB - Modern information storage technology strives toward realizing 3D devices. A very promising idea for 3D magnetic memory, called vertical race-track memory, proposed in 2008, was to manipulate information by utilizing current-driven domain wall (DW) motion in magnetic nanowires (NWs) [1]. Specifically, magnetic domains, separated by DWs, represent bits of information, whereas DW position
and motion (i.e. information storage and transfer) can be controlled by spin-polarized electric currents. The main challenge in realizing this idea comes from the standard micro-fabrication methods, which are highly effective for fabrication planar devices but very limited in capabilities when it comes to out-ofplane structures. One way to increase the memory density could be stacking of storage layers in a single
device. This complicates significantly the fabrication process even for a small number of layers. Hence, there is a need for efficient alternative fabrication concepts.
UR - http://hdl.handle.net/10754/667933
UR - https://www.cambridge.org/core/product/identifier/S1431927618005214/type/journal_article
U2 - 10.1017/s1431927618005214
DO - 10.1017/s1431927618005214
M3 - Article
SN - 1431-9276
VL - 24
SP - 944
EP - 945
JO - Microscopy and Microanalysis
JF - Microscopy and Microanalysis
IS - S1
ER -