Stochastic memristor logic devices

Rawan Naous (Inventor), Khaled N. Salama (Inventor)

Research output: Patent


In accordance with the present disclosure, one embodiment includes a memristor that is caused to be in a particular resistance state by a voltage applied across terminals of the memristor. A first logical input and a second logical input that are below a threshold voltage of the memristor are applied to a first terminal of the memristor. A first control input and a second control input are applied to a second terminal of the memristor. A logical output is determined based on a resistance state of the memristor.
Original languageEnglish (US)
Patent numberWO2018193338A1
StatePublished - Oct 25 2018

Bibliographical note

KAUST Repository Item: Exported on 2019-02-13


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