SOC-NLNA: Synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers

Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud

Research output: Chapter in Book/Report/Conference proceedingConference contribution

40 Scopus citations

Abstract

In this paper we present SOC-NLNA, a systematic synthesis methodology for fully integrated narrow-band CMOS Low Noise Amplifiers (LNA) in high performance System-on-Chip (SoC) designs. SOC-NLNA is based on deterministic numerical nonlinear optimization and the Normal Boundary Intersection (NBI) method for Pareto optimization. To enable SoC integration, we simultaneously optimize both devices and passive components to yield integrated inductor values that are significantly less than those generated by traditional design techniques. When the synthesized LNAs are simulated using Cadence SpectreRF, SOC-NLNA yields up to 35 and 58 percent improvement in noise figure and gain. Leveraging the efficiency of our methodology, we are able to generate the Pareto surfaces between LNA performance metrics in seconds. Copyright 2006 ACM.
Original languageEnglish (US)
Title of host publicationProceedings - Design Automation Conference
Pages879-884
Number of pages6
DOIs
StatePublished - Dec 1 2006
Externally publishedYes

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