Reduced graphene oxide electrodes for large area organic electronics

Paul H. Wöbkenberg, Goki Eda, Dong Seok Leem, John C. De Mello, Donal D.C. Bradley, Manish Chhowalla, Thomas D. Anthopoulos

Research output: Contribution to journalArticlepeer-review

95 Scopus citations


Interlayer lithography is used to pattern highly conductive, solution-processed, reduced graphene oxide source and drain electrodes down to 10 μm gaps. These patterned electrodes allow for the fabrication of high-performance organic thin-film transistors and complementary circuits. The method offers a viable route towards organic electronics fabricated entirely by solution processing.

Original languageEnglish (US)
Pages (from-to)1558-1562
Number of pages5
JournalAdvanced Materials
Issue number13
StatePublished - Apr 5 2011
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2019-11-27


  • dielectrics
  • graphene
  • lithography
  • organic semiconductors
  • self-assembled monolayers
  • transistors

ASJC Scopus subject areas

  • General Materials Science
  • Mechanics of Materials
  • Mechanical Engineering


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