Power gating of VLSI circuits using MEMS switches in low power applications

Hosam Shobak; Mohamed T. Ghoneim; Nawal El Boghdady; Sarah Halawa; Sophinese M. Iskander; Mohab H. Anis

doi:10.1109/ICM.2011.6177407

Power gating of VLSI circuits using MEMS switches in low power applications

Hosam Shobak, Mohamed T. Ghoneim, Nawal El Boghdady, Sarah Halawa, Sophinese M. Iskander, Mohab H. Anis

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.

Original language	English (US)
Title of host publication	ICM 2011 Proceeding
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
ISBN (Print)	9781457722073
DOIs	https://doi.org/10.1109/ICM.2011.6177407
State	Published - Dec 2011

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@inproceedings{398d217163e14fc2b9bffe3aea5578d7,

title = "Power gating of VLSI circuits using MEMS switches in low power applications",

abstract = "Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. {\textcopyright} 2011 IEEE.",

author = "Hosam Shobak and Ghoneim, {Mohamed T.} and {El Boghdady}, Nawal and Sarah Halawa and Iskander, {Sophinese M.} and Anis, {Mohab H.}",

note = "KAUST Repository Item: Exported on 2020-10-01",

year = "2011",

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doi = "10.1109/ICM.2011.6177407",

language = "English (US)",

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booktitle = "ICM 2011 Proceeding",

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T1 - Power gating of VLSI circuits using MEMS switches in low power applications

AU - Shobak, Hosam

AU - Ghoneim, Mohamed T.

AU - El Boghdady, Nawal

AU - Halawa, Sarah

AU - Iskander, Sophinese M.

AU - Anis, Mohab H.

N1 - KAUST Repository Item: Exported on 2020-10-01

PY - 2011/12

Y1 - 2011/12

N2 - Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.

AB - Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.

UR - http://hdl.handle.net/10754/564472

UR - http://ieeexplore.ieee.org/document/6177407/

UR - http://www.scopus.com/inward/record.url?scp=84860667610&partnerID=8YFLogxK

U2 - 10.1109/ICM.2011.6177407

DO - 10.1109/ICM.2011.6177407

M3 - Conference contribution

SN - 9781457722073

BT - ICM 2011 Proceeding

PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

Power gating of VLSI circuits using MEMS switches in low power applications

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