Piece-wise parabolic interpolation for direct digital frequency synthesis

Ahmed M. Eltawil; Babak Daneshrad

Piece-wise parabolic interpolation for direct digital frequency synthesis

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, a compact architecture and implementation for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sinusoidal functions compared to existing architectures. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the Read-Only Memory (ROM). The ROM size is consistently less than 1 Kbits for SFDR values up to 85 dBc.

Original language	English (US)
Title of host publication	Proceedings of the Custom Integrated Circuits Conference
State	Published - Jan 1 2002
Externally published	Yes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2019-11-20

Cite this

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title = "Piece-wise parabolic interpolation for direct digital frequency synthesis",

abstract = "In this paper, a compact architecture and implementation for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sinusoidal functions compared to existing architectures. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the Read-Only Memory (ROM). The ROM size is consistently less than 1 Kbits for SFDR values up to 85 dBc.",

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Y1 - 2002/1/1

N2 - In this paper, a compact architecture and implementation for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sinusoidal functions compared to existing architectures. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the Read-Only Memory (ROM). The ROM size is consistently less than 1 Kbits for SFDR values up to 85 dBc.

AB - In this paper, a compact architecture and implementation for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sinusoidal functions compared to existing architectures. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the Read-Only Memory (ROM). The ROM size is consistently less than 1 Kbits for SFDR values up to 85 dBc.

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M3 - Conference contribution

BT - Proceedings of the Custom Integrated Circuits Conference

ER -

Piece-wise parabolic interpolation for direct digital frequency synthesis

Abstract

Bibliographical note

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