This paper demonstrates the seamless fabrication of optoelectronic memory by integrating HfSe 2 as a charge-trapping layer in a MOS memory structure. Through a spin coating technique, solution-processable HfSe 2 flakes with average thicknesses of 2 nm were deposited between the tunneling and blocking oxide layers. The charge-trapping material distribution and thickness were explored by Atomic Force Microscopy and X-ray Diffraction Spectroscopy. The electrical characterization of MOS memory revealed a memory window of 5.5 Volts under ±16 Volts biasing. Furthermore, the memory endurance exceeds 10 4 electrical programming and erasing cycles. The retention test performed at room temperature showed that the memory device is expected to lose only 10% of the stored charges after 10 years. Under light stimuli (405nm wavelength and output power ~ 20 mW) with electrical readout voltage, the MOS memory showed an increase in the memory window from 5.5 Volts to 6.5 Volts.
Bibliographical noteKAUST Repository Item: Exported on 2023-09-04
Acknowledgements: Research supported by King Abdullah University of Science and Technology baseline fund.