On the VLSI Implementation of low complexity K-best MIMO decoders

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations


The VLSI Implementation of Maximum Likelihood (ML) detection for higher order Multiple Input Multiple Output (MIMO) systems continues to be a major challenge. Battery driven handheld devices impose strict area and power constraints while demanding guaranteed performance over a wide range of operating conditions. This paper presents a modified, low complexity K-best detector for a 4 × 4, 64 QAM MIMO system, which uses a modified path extension algorithm to bring down the computational complexity by more than 50%. It also exploits the structure of a QAM constellation to achieve low power operation by reducing the number of costly multiplication operations while computing the path metrics. The two new approaches, combined with a resource shared architecture leads to the implementation of a very efficient FPGA based system, where we verify the performance of the algorithm.

Original languageEnglish (US)
Title of host publicationICM'08 - 20th International Conference on Microelectronics
Number of pages4
StatePublished - Dec 1 2008
Externally publishedYes
Event20th International Conference on Microelectronics, ICM'08 - Sharjah, United Arab Emirates
Duration: Dec 14 2008Dec 17 2008


Other20th International Conference on Microelectronics, ICM'08
Country/TerritoryUnited Arab Emirates

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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