TY - GEN
T1 - On the short-term predictability of fully digital chaotic oscillators for pseudo-random number generation
AU - Radwan, Ahmed Gomaa
AU - Mansingka, Abhinav S.
AU - Salama, Khaled N.
AU - Zidan, Mohammed A.
N1 - KAUST Repository Item: Exported on 2020-10-01
PY - 2014/5/16
Y1 - 2014/5/16
N2 - This paper presents a digital implementation of a 3rd order chaotic system using the Euler approximation. Short-term predictability is studied in relation to system precision, Euler step size and attractor size and optimal parameters for maximum performance are derived. Defective bits from the native chaotic output are neglected and the remaining pass the NIST SP. 800-22 tests without post-processing. The resulting optimized pseudorandom number generator has throughput up to 17.60 Gbits/s for a 64-bit design experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.85%.
AB - This paper presents a digital implementation of a 3rd order chaotic system using the Euler approximation. Short-term predictability is studied in relation to system precision, Euler step size and attractor size and optimal parameters for maximum performance are derived. Defective bits from the native chaotic output are neglected and the remaining pass the NIST SP. 800-22 tests without post-processing. The resulting optimized pseudorandom number generator has throughput up to 17.60 Gbits/s for a 64-bit design experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.85%.
UR - http://hdl.handle.net/10754/321914
UR - http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=6815432
UR - http://www.scopus.com/inward/record.url?scp=84901414795&partnerID=8YFLogxK
U2 - 10.1109/ICECS.2013.6815432
DO - 10.1109/ICECS.2013.6815432
M3 - Conference contribution
SN - 9781479924523
SP - 373
EP - 376
BT - 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)
PB - Institute of Electrical and Electronics Engineers (IEEE)
ER -