On the accuracy of return path assumption for loop inductance extraction for 0.1 μm technology and beyond

So Young Kim, Yehia Massoud, S. Simon Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Scopus citations

Abstract

The most common assumption for chip-level inductance extraction is to restrict the current return path to the closest power or ground lines. This paper shows that this assumption is not necessarily valid for technologies beyond 0.1 μm. The actual inductance can exceed twice the value that is extracted from the model considering only the nearest current return paths. Analytical formulae to predict the worst case self inductance are proposed to deal with the errors that result from this assumption. These equations can be used as metrics to decide the size of inductance extraction window for future CAD tools.
Original languageEnglish (US)
Title of host publicationProceedings - International Symposium on Quality Electronic Design, ISQED
PublisherIEEE Computer Societyhelp@computer.org
Pages401-404
Number of pages4
ISBN (Print)0769518818
DOIs
StatePublished - Jan 1 2003
Externally publishedYes

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