TY - JOUR
T1 - Numerical analysis of a polysilicon-based resistive memory device
AU - Berco, Dan
AU - Chand, Umesh
N1 - KAUST Repository Item: Exported on 2020-10-01
PY - 2018/3/8
Y1 - 2018/3/8
N2 - This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $10^{3}$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.
AB - This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $10^{3}$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.
UR - http://hdl.handle.net/10754/627459
UR - http://link.springer.com/article/10.1007/s10825-018-1154-4
UR - http://www.scopus.com/inward/record.url?scp=85043354840&partnerID=8YFLogxK
U2 - 10.1007/s10825-018-1154-4
DO - 10.1007/s10825-018-1154-4
M3 - Article
SN - 1569-8025
VL - 17
SP - 766
EP - 773
JO - Journal of Computational Electronics
JF - Journal of Computational Electronics
IS - 2
ER -