Numerical analysis of a polysilicon-based resistive memory device

Dan Berco, Umesh Chand

Research output: Contribution to journalArticlepeer-review


This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $10^{3}$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.
Original languageEnglish (US)
Pages (from-to)766-773
Number of pages8
JournalJournal of Computational Electronics
Issue number2
StatePublished - Mar 8 2018

Bibliographical note

KAUST Repository Item: Exported on 2020-10-01


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