Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design

Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud

Research output: Contribution to journalArticlepeer-review

11 Scopus citations


In this paper, we present a systematic synthesis methodology for fully integrated narrow-band CMOS low-noise amplifiers (LNAs) in high-performance system-on-chip (SoC) designs. The methodology is based on deterministic gradient-based numerical nonlinear optimization and the normal boundary intersection (NBI) method for Pareto optimization. We simultaneously optimize transistor widths, bias voltages, and input and output matching network passive components, which yields integrated inductor values that are more than one order of magnitude less than those generated by several existing equation-based LNA design techniques. By generating significantly smaller inductor values, we enable the SoC integration of the complete LNA. When the synthesized LNAs are characterized using circuit-level simulation, our methodology yields up to 35% and 58% improvement in noise figure and gain, respectively. © 2007 Elsevier Ltd. All rights reserved.
Original languageEnglish (US)
Pages (from-to)1123-1134
Number of pages12
JournalMicroelectronics Journal
Issue number12
StatePublished - Dec 1 2007
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2022-09-13

ASJC Scopus subject areas

  • General Engineering


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