MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

Kai-Shin Li; Bo-Wei Wu; Lain-Jong Li; Ming-Yang Li; Chia-Chin Kevin Cheng; Cho-Lun Hsu; Chang-Hsien Lin; Yi-Ju Chen; Chun-Chi Chen; Chien-Ting Wu; Min-Cheng Chen; Jia-Min Shieh; Wen-Kuan Yeh; Yu-Lun Chueh; Fu-Liang Yang; Chenming Hu

doi:10.1109/VLSIT.2016.7573375

MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

Kai-Shin Li, Bo-Wei Wu, Lain-Jong Li, Ming-Yang Li, Chia-Chin Kevin Cheng, Cho-Lun Hsu, Chang-Hsien Lin, Yi-Ju Chen, Chun-Chi Chen, Chien-Ting Wu, Min-Cheng Chen, Jia-Min Shieh, Wen-Kuan Yeh, Yu-Lun Chueh, Fu-Liang Yang, Chenming Hu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

15 Scopus citations

Abstract

A U-shape MoS2 pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS2 deposition, thin MoS2 is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology.

Original language	English (US)
Title of host publication	2016 IEEE Symposium on VLSI Technology
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
ISBN (Print)	9781509006380
DOIs	https://doi.org/10.1109/VLSIT.2016.7573375
State	Published - Jun 2016

Bibliographical note

KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: The experiment was performed by the National Nano Device Laboratories. Supported by the Ministry of Science and Technology,
Taiwan and Applied Materials under NCTU-UCB I-RiCE program.

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10.1109/VLSIT.2016.7573375

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Li, K.-S., Wu, B.-W., Li, L.-J., Li, M.-Y., Cheng, C.-C. K., Hsu, C.-L., Lin, C.-H., Chen, Y.-J., Chen, C.-C., Wu, C.-T., Chen, M.-C., Shieh, J.-M., Yeh, W.-K., Chueh, Y.-L., Yang, F.-L., & Hu, C. (2016). MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability. In 2016 IEEE Symposium on VLSI Technology Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/VLSIT.2016.7573375

@inproceedings{34183375bc7449d18b73b0ebd50740aa,

title = "MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability",

abstract = "A U-shape MoS2 pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS2 deposition, thin MoS2 is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology.",

author = "Kai-Shin Li and Bo-Wei Wu and Lain-Jong Li and Ming-Yang Li and Cheng, {Chia-Chin Kevin} and Cho-Lun Hsu and Chang-Hsien Lin and Yi-Ju Chen and Chun-Chi Chen and Chien-Ting Wu and Min-Cheng Chen and Jia-Min Shieh and Wen-Kuan Yeh and Yu-Lun Chueh and Fu-Liang Yang and Chenming Hu",

note = "KAUST Repository Item: Exported on 2020-10-01 Acknowledgements: The experiment was performed by the National Nano Device Laboratories. Supported by the Ministry of Science and Technology, Taiwan and Applied Materials under NCTU-UCB I-RiCE program.",

year = "2016",

month = jun,

doi = "10.1109/VLSIT.2016.7573375",

language = "English (US)",

isbn = "9781509006380",

booktitle = "2016 IEEE Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

}

Li, K-S, Wu, B-W, Li, L-J, Li, M-Y, Cheng, C-CK, Hsu, C-L, Lin, C-H, Chen, Y-J, Chen, C-C, Wu, C-T, Chen, M-C, Shieh, J-M, Yeh, W-K, Chueh, Y-L, Yang, F-L & Hu, C 2016, MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability. in 2016 IEEE Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/VLSIT.2016.7573375

TY - GEN

T1 - MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

AU - Li, Kai-Shin

AU - Wu, Bo-Wei

AU - Li, Lain-Jong

AU - Li, Ming-Yang

AU - Cheng, Chia-Chin Kevin

AU - Hsu, Cho-Lun

AU - Lin, Chang-Hsien

AU - Chen, Yi-Ju

AU - Chen, Chun-Chi

AU - Wu, Chien-Ting

AU - Chen, Min-Cheng

AU - Shieh, Jia-Min

AU - Yeh, Wen-Kuan

AU - Chueh, Yu-Lun

AU - Yang, Fu-Liang

AU - Hu, Chenming

N1 - KAUST Repository Item: Exported on 2020-10-01 Acknowledgements: The experiment was performed by the National Nano Device Laboratories. Supported by the Ministry of Science and Technology, Taiwan and Applied Materials under NCTU-UCB I-RiCE program.

PY - 2016/6

Y1 - 2016/6

N2 - A U-shape MoS2 pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS2 deposition, thin MoS2 is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology.

AB - A U-shape MoS2 pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS2 deposition, thin MoS2 is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology.

UR - http://hdl.handle.net/10754/656025

UR - https://ieeexplore.ieee.org/document/7573375/

UR - http://www.scopus.com/inward/record.url?scp=84990966345&partnerID=8YFLogxK

U2 - 10.1109/VLSIT.2016.7573375

DO - 10.1109/VLSIT.2016.7573375

M3 - Conference contribution

SN - 9781509006380

BT - 2016 IEEE Symposium on VLSI Technology

PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

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