Abstract
In this work, a MOS memory with 4.56-nm ultrathin Al2O3-TiO2 nanolaminates thin film deposited by Atomic Layer Deposition (ALD) followed by 1-nm HfO2 tunnel oxide deposited by Plasma-Assisted ALD is studied. The charge trapping layer consists of 2.85-nm Si-nanoparticles (Si-NPs). A memory effect is observed using high frequency C-V measurements. The shift of the threshold voltage (Vt) obtained from the hysteresis measurements at 10/-10 V program/erase voltage is around 5 V and a 3 V Vt shift is obtained at low operating voltage of 6/-6 V. In addition, the calculated retention characteristic of the charges in the Si-NPs memory (>10 years) makes such memory structure promising for applications in non-volatile memory devices.
Original language | English (US) |
---|---|
Title of host publication | IEEE-NANO 2015 - 15th International Conference on Nanotechnology |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 663-665 |
Number of pages | 3 |
ISBN (Electronic) | 9781467381550 |
DOIs | |
State | Published - 2015 |
Event | 15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015 - Rome, Italy Duration: Jul 27 2015 → Jul 30 2015 |
Publication series
Name | IEEE-NANO 2015 - 15th International Conference on Nanotechnology |
---|
Conference
Conference | 15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015 |
---|---|
Country/Territory | Italy |
City | Rome |
Period | 07/27/15 → 07/30/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- Al2O3-TiO nanolaminates
- atomic layer deposition
- Charge trapping memory
- HfO2
- MOS
- retention time
ASJC Scopus subject areas
- Process Chemistry and Technology
- Electrical and Electronic Engineering
- Ceramics and Composites
- Electronic, Optical and Magnetic Materials
- Surfaces, Coatings and Films