Abstract
In this work, the effect of using a double layer of high-κ tunnel oxides Al2O3/HfO2 instead of a single layer Al2O3 in MOS memory with ZnO charge trapping layer is studied. A memory effect due to charging in the ZnO layer is observed using high frequency C-V measurements. The shift of the threshold voltage (Vt) obtained from the hysteresis measurements at 10/-10 V program/erase voltage is around 3.3 V with single layer tunnel oxide while 7 V with the double layer tunnel oxide with same total oxide thickness. In addition, the memory structures show long retention times (>10 years) which make them promising for applications in non-volatile memory devices. Moreover, the results highlight that tunnel band engineering can be used to further reduce the operating voltage and equivalent oxide thickness of future memory devices without sacrificing the memory performance.
Original language | English (US) |
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Title of host publication | IEEE-NANO 2015 - 15th International Conference on Nanotechnology |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 766-768 |
Number of pages | 3 |
ISBN (Electronic) | 9781467381550 |
DOIs | |
State | Published - 2015 |
Event | 15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015 - Rome, Italy Duration: Jul 27 2015 → Jul 30 2015 |
Publication series
Name | IEEE-NANO 2015 - 15th International Conference on Nanotechnology |
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Conference
Conference | 15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015 |
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Country/Territory | Italy |
City | Rome |
Period | 07/27/15 → 07/30/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- Al2O3
- atomic layer deposition
- Charge trapping memory
- HfO2
- MOS
- retention time
- ZnO
ASJC Scopus subject areas
- Process Chemistry and Technology
- Electrical and Electronic Engineering
- Ceramics and Composites
- Electronic, Optical and Magnetic Materials
- Surfaces, Coatings and Films