The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability and ability to retain their state when turned off. In this paper we present design considerations for memristor memories for robust operation and discuss the trade-off between reading operations, refresh rates, and writing, stemming from the inherent variability of the memristor state when read.
|Original language||English (US)|
|Title of host publication||Proceedings of the IEEE Conference on Nanotechnology|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||5|
|State||Published - Nov 26 2014|