Memristor-Based Synaptic Sampling Machines

I. Dolzhikova; Khaled N. Salama; V. Kizheppatt; A. James

doi:10.1109/NANO.2018.8626382

Memristor-Based Synaptic Sampling Machines

I. Dolzhikova, Khaled N. Salama, V. Kizheppatt, A. James

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.

Original language	English (US)
Title of host publication	2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO)
Publisher	IEEE
ISBN (Print)	9781538653364
DOIs	https://doi.org/10.1109/NANO.2018.8626382
State	Published - Feb 28 2019

Bibliographical note

KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: We would like to express special thanks to Rawan Nouz for the initial ideas, technical support and useful discussions on the topic of synaptic sampling. In addition to that, we thank Umesh Chand and ulrich Buttner for guidance and support.

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10.1109/NANO.2018.8626382

https://repository.kaust.edu.sa/bitstream/10754/652973/1/Conference%20Paperfile1.pdf

Cite this

@inproceedings{97c1af51cfd54514a269b3106d02a8f3,

title = "Memristor-Based Synaptic Sampling Machines",

abstract = "Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.",

author = "I. Dolzhikova and Salama, {Khaled N.} and V. Kizheppatt and A. James",

note = "KAUST Repository Item: Exported on 2020-10-01 Acknowledgements: We would like to express special thanks to Rawan Nouz for the initial ideas, technical support and useful discussions on the topic of synaptic sampling. In addition to that, we thank Umesh Chand and ulrich Buttner for guidance and support.",

year = "2019",

month = feb,

day = "28",

doi = "10.1109/NANO.2018.8626382",

language = "English (US)",

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booktitle = "2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO)",

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T1 - Memristor-Based Synaptic Sampling Machines

AU - Dolzhikova, I.

AU - Salama, Khaled N.

AU - Kizheppatt, V.

AU - James, A.

N1 - KAUST Repository Item: Exported on 2020-10-01 Acknowledgements: We would like to express special thanks to Rawan Nouz for the initial ideas, technical support and useful discussions on the topic of synaptic sampling. In addition to that, we thank Umesh Chand and ulrich Buttner for guidance and support.

PY - 2019/2/28

Y1 - 2019/2/28

N2 - Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.

AB - Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.

UR - http://hdl.handle.net/10754/652973

UR - https://ieeexplore.ieee.org/document/8626382

UR - http://www.scopus.com/inward/record.url?scp=85062294912&partnerID=8YFLogxK

U2 - 10.1109/NANO.2018.8626382

DO - 10.1109/NANO.2018.8626382

M3 - Conference contribution

SN - 9781538653364

BT - 2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO)

PB - IEEE

ER -

Memristor-Based Synaptic Sampling Machines

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