Abstract
A memory structure containing ultra-small 2-nm laser-synthesized silicon nanoparticles is demonstrated. The Si-nanoparticles are embedded between an atomic layer deposited high-κ dielectric Al 2 O 3 layer and a sputtered SiO 2 layer. A memory effect due to charging of the Si nanoparticles is observed using high frequency C-V measurements. The shift of the threshold voltage obtained from the hysteresis measurements is around 3.3V at 10/-10V gate voltage sweeping. The analysis of the energy band diagram of the memory structure and the negative shift of the programmed C-V curve indicate that holes are tunneling from p-type Si via Fowler-Nordheim tunneling and are being trapped in the Si nanoparticles. In addition, the structures show good endurance characteristic (>10 5 program/erase cycles) and long retention time (>10 years), which make them promising for applications in non-volatile memory devices.
Original language | English (US) |
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Pages (from-to) | 1751-1755 |
Number of pages | 5 |
Journal | Physica Status Solidi (A) Applications and Materials Science |
Volume | 212 |
Issue number | 8 |
DOIs | |
State | Published - Aug 1 2015 |
Bibliographical note
Publisher Copyright:© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Keywords
- atomic layer deposition
- charge trapping memory
- laser processing
- metal-oxide-semiconductor structures
- nanoparticles
- silicon
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Surfaces and Interfaces
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering
- Materials Chemistry