Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

Barbara Terheiden; Tabitha Ballmann; Renate Horbelt; Yvonne Schiele; Sabine Seren; Jan Ebser; G. Hahn; Verena Mertens; Max B. Koentopp; Maximilian Scherff; Jörg W. Müller; Zachary C. Holman; Antoine Descoeudres; Stefaan De Wolf; Silvia Martin De Nicolas; Jonas Geissbuehler; Christophe Ballif; Bernd Weber; Pierre Saint-Cast; Michael Rauer; Christian Schmiga; Stefan W. Glunz; Dominique J. Morrison; Stephen Devenport; Danilo Antonelli; Chiara Busto; Federico Grasso; Francesca Ferrazza; Elisa Tonelli; Wolfgang Oswald

doi:10.1002/pssa.201431241

Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

Barbara Terheiden^*, Tabitha Ballmann, Renate Horbelt, Yvonne Schiele, Sabine Seren, Jan Ebser, G. Hahn, Verena Mertens, Max B. Koentopp, Maximilian Scherff, Jörg W. Müller, Zachary C. Holman, Antoine Descoeudres, Stefaan De Wolf, Silvia Martin De Nicolas, Jonas Geissbuehler, Christophe Ballif, Bernd Weber, Pierre Saint-Cast, Michael RauerChristian Schmiga, Stefan W. Glunz, Dominique J. Morrison, Stephen Devenport, Danilo Antonelli, Chiara Busto, Federico Grasso, Francesca Ferrazza, Elisa Tonelli, Wolfgang Oswald

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

51 Scopus citations

Abstract

Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-μm-thick, industrially feasible crystalline silicon solar cells ("20plms"), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 μm thick, with a maximum efficiency of 21.1% on an 80-μm-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-μm-thick wafers.

Original language	English (US)
Pages (from-to)	13-24
Number of pages	12
Journal	Physica Status Solidi (A) Applications and Materials Science
Volume	212
Issue number	1
DOIs	https://doi.org/10.1002/pssa.201431241
State	Published - Jan 2015
Externally published	Yes

Bibliographical note

Publisher Copyright:
© 2014 Wiley-VCH Verlag GmbH & Co. KGaA.

Keywords

High efficiency
Pilot production
Silicon
Solar cells
Thin wafers

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Surfaces and Interfaces
Surfaces, Coatings and Films
Electrical and Electronic Engineering
Materials Chemistry

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1002/pssa.201431241

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Terheiden, B., Ballmann, T., Horbelt, R., Schiele, Y., Seren, S., Ebser, J., Hahn, G., Mertens, V., Koentopp, M. B., Scherff, M., Müller, J. W., Holman, Z. C., Descoeudres, A., De Wolf, S., De Nicolas, S. M., Geissbuehler, J., Ballif, C., Weber, B., Saint-Cast, P., ... Oswald, W. (2015). Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line. Physica Status Solidi (A) Applications and Materials Science, 212(1), 13-24. https://doi.org/10.1002/pssa.201431241

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title = "Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line",

abstract = "Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-μm-thick, industrially feasible crystalline silicon solar cells ({"}20plms{"}), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 μm thick, with a maximum efficiency of 21.1% on an 80-μm-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-μm-thick wafers.",

keywords = "High efficiency, Pilot production, Silicon, Solar cells, Thin wafers",

author = "Barbara Terheiden and Tabitha Ballmann and Renate Horbelt and Yvonne Schiele and Sabine Seren and Jan Ebser and G. Hahn and Verena Mertens and Koentopp, {Max B.} and Maximilian Scherff and M{\"u}ller, {J{\"o}rg W.} and Holman, {Zachary C.} and Antoine Descoeudres and {De Wolf}, Stefaan and {De Nicolas}, {Silvia Martin} and Jonas Geissbuehler and Christophe Ballif and Bernd Weber and Pierre Saint-Cast and Michael Rauer and Christian Schmiga and Glunz, {Stefan W.} and Morrison, {Dominique J.} and Stephen Devenport and Danilo Antonelli and Chiara Busto and Federico Grasso and Francesca Ferrazza and Elisa Tonelli and Wolfgang Oswald",

note = "Publisher Copyright: {\textcopyright} 2014 Wiley-VCH Verlag GmbH & Co. KGaA.",

year = "2015",

month = jan,

doi = "10.1002/pssa.201431241",

language = "English (US)",

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Terheiden, B, Ballmann, T, Horbelt, R, Schiele, Y, Seren, S, Ebser, J, Hahn, G, Mertens, V, Koentopp, MB, Scherff, M, Müller, JW, Holman, ZC, Descoeudres, A, De Wolf, S, De Nicolas, SM, Geissbuehler, J, Ballif, C, Weber, B, Saint-Cast, P, Rauer, M, Schmiga, C, Glunz, SW, Morrison, DJ, Devenport, S, Antonelli, D, Busto, C, Grasso, F, Ferrazza, F, Tonelli, E & Oswald, W 2015, 'Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line', Physica Status Solidi (A) Applications and Materials Science, vol. 212, no. 1, pp. 13-24. https://doi.org/10.1002/pssa.201431241

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T1 - Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

AU - Terheiden, Barbara

AU - Ballmann, Tabitha

AU - Horbelt, Renate

AU - Schiele, Yvonne

AU - Seren, Sabine

AU - Ebser, Jan

AU - Hahn, G.

AU - Mertens, Verena

AU - Koentopp, Max B.

AU - Scherff, Maximilian

AU - Müller, Jörg W.

AU - Holman, Zachary C.

AU - Descoeudres, Antoine

AU - De Wolf, Stefaan

AU - De Nicolas, Silvia Martin

AU - Geissbuehler, Jonas

AU - Ballif, Christophe

AU - Weber, Bernd

AU - Saint-Cast, Pierre

AU - Rauer, Michael

AU - Schmiga, Christian

AU - Glunz, Stefan W.

AU - Morrison, Dominique J.

AU - Devenport, Stephen

AU - Antonelli, Danilo

AU - Busto, Chiara

AU - Grasso, Federico

AU - Ferrazza, Francesca

AU - Tonelli, Elisa

AU - Oswald, Wolfgang

PY - 2015/1

Y1 - 2015/1

N2 - Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-μm-thick, industrially feasible crystalline silicon solar cells ("20plms"), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 μm thick, with a maximum efficiency of 21.1% on an 80-μm-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-μm-thick wafers.

AB - Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-μm-thick, industrially feasible crystalline silicon solar cells ("20plms"), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 μm thick, with a maximum efficiency of 21.1% on an 80-μm-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-μm-thick wafers.

KW - High efficiency

KW - Pilot production

KW - Silicon

KW - Solar cells

KW - Thin wafers

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U2 - 10.1002/pssa.201431241

DO - 10.1002/pssa.201431241

M3 - Article

AN - SCOPUS:84920792408

SN - 1862-6300

VL - 212

SP - 13

EP - 24

JO - Physica Status Solidi (A) Applications and Materials Science

JF - Physica Status Solidi (A) Applications and Materials Science

IS - 1

ER -

Manufacturing 100-μm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

UN SDGs

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