Low power Zinc-Oxide based charge trapping memory with embedded silicon nanoparticles

A. Nayfeh, A. K. Okyay, N. El-Atab, A. Ozcan, S. Alkis

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

In this work, a bottom-gate charge trapping memory device with Zinc-Oxide (ZnO) channel and 2-nm Si nanoparticles (Si-NPs) embedded in ZnO charge trapping layer is demonstrated. The active layers of the memory device are deposited by atomic layer deposition (ALD) and the Si-NPs are deposited by spin coating. The Si-NPs memory exhibits a threshold voltage (Vt) shift of 6.3 V at an operating voltage of -10/10 V while 2.6 V Vt shift is obtained without nanoparticles confirming that the Si-NPs act as energy states within the bandgap of the ZnO layer. In addition, a 3.4 V Vt is achieved at a very low operating voltage of -1 V/1 V due to the charging of the Si-NPs through Poole-Frenkel emission mechanism at an electric field across the tunnel oxide E > 0.36 MV/cm. The results highlight a promising technology for future ultra-low power memory devices.

Original languageEnglish (US)
Pages45-49
Number of pages5
DOIs
StatePublished - 2014
EventSymposium on State-of-the-Art Program on Compound Semiconductors 56, SOTAPOCS 2014 - 2014 ECS and SMEQ Joint International Meeting - Cancun, Mexico
Duration: Oct 5 2014Oct 9 2014

Other

OtherSymposium on State-of-the-Art Program on Compound Semiconductors 56, SOTAPOCS 2014 - 2014 ECS and SMEQ Joint International Meeting
Country/TerritoryMexico
CityCancun
Period10/5/1410/9/14

Bibliographical note

Publisher Copyright:
© The Electrochemical Society.

ASJC Scopus subject areas

  • General Engineering

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