The reliability of a bulk fin field-effect transistor (FinFET) with a high-k dielectric/metal-gate stack has been investigated by comparing the effects of DC and AC stresses. It is well known that the relaxation during the off-cycle of the AC stress decreases the Vth shift and enhances the device lifetime due to electron detrapping from the high-k dielectric. We found that the relaxation in the interface traps is significantly weaker than that of bulk traps during the unipolar and bipolar AC stresses. The weak recovery is attributed to the concurrent interface state generation during a positive-bias temperature instability (PBTI) stress. Eventually, the interface traps became a major source of the device drift (over 60%) at the high temperature of 400 K. This finding suggests that a new strategy is required to address the PBTI reliability focusing on the residual interface states as well as the bulk trapping, particularly at a high temperature.
|Original language||English (US)|
|Number of pages||5|
|State||Published - May 10 2019|
Bibliographical noteKAUST Repository Item: Exported on 2020-10-01
Acknowledgements: This study was partly supported by the Nano Materials Technology Development Program (2016M3A7B4909941) and Creative Materials Discovery Program on Creative Multilevel Research Center (2015M3D1A1068062) through the National Research Foundation (NRF) of Korea, funded by the Ministry of Science and ICT, and by SAMSUNG System LSI.