Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process

Zhibo Zhang*, S. C. Song, Craig Huffman, Muhammad M. Hussain, Joel Barnett, Naim Moumen, Husam N. Alshareef, Prashant Majhi, Johnny H. Sim, Sang Ho Bae, Byoung Hun Lee

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

44 Scopus citations


The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO2 dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on HfO2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.

Original languageEnglish (US)
Pages (from-to)G271-G274
JournalElectrochemical and Solid-State Letters
Issue number10
StatePublished - 2005
Externally publishedYes

ASJC Scopus subject areas

  • General Chemical Engineering
  • General Materials Science
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering


Dive into the research topics of 'Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process'. Together they form a unique fingerprint.

Cite this