The hardware implementation of neuro-inspired machine learning algorithms for near sensor processing on edge devices is an open problem. In this work, we propose a solution to written word recognition problem related to sequence learning tasks with images. Applying a theoretical framework of neocortex functionality as a sequence learning algorithm on a hardware implementation of Hierarchical Temporal Memory (HTM), we test the potential use of HTM in near-sensor on-chip natural language processing for text/symbol recognition.
|Original language||English (US)|
|Title of host publication||2018 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2018|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - Nov 28 2018|