TY - GEN
T1 - High temperature performance of flexible SOI FinFETs with sub-20 nm fins
AU - Diab, Amer El Hajj
AU - Sevilla, Galo T.
AU - Ghoneim, Mohamed T.
AU - Hussain, Muhammad Mustafa
N1 - KAUST Repository Item: Exported on 2020-10-01
PY - 2014/10
Y1 - 2014/10
N2 - We demonstrate a flexible version of the semiconductor industry's most advanced transistor topology - FinFET on silicon-on-insulator (SOI) with sub-20 nm fins and high-κ/metal gate stacks. This is the most advanced flexible (0.5 mm bending radius) transistor on SOI ever demonstrated for exciting opportunities in high performance flexible electronics with stylish product design. For the first time, we characterize such device from room to high temperature (150 °C). And we discuss the dependence of the I-V curves with temperature.
AB - We demonstrate a flexible version of the semiconductor industry's most advanced transistor topology - FinFET on silicon-on-insulator (SOI) with sub-20 nm fins and high-κ/metal gate stacks. This is the most advanced flexible (0.5 mm bending radius) transistor on SOI ever demonstrated for exciting opportunities in high performance flexible electronics with stylish product design. For the first time, we characterize such device from room to high temperature (150 °C). And we discuss the dependence of the I-V curves with temperature.
UR - http://hdl.handle.net/10754/575825
UR - http://ieeexplore.ieee.org/document/7028211/
UR - http://www.scopus.com/inward/record.url?scp=84946692908&partnerID=8YFLogxK
U2 - 10.1109/S3S.2014.7028211
DO - 10.1109/S3S.2014.7028211
M3 - Conference contribution
SN - 9781479974382
BT - 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
PB - Institute of Electrical and Electronics Engineers (IEEE)
ER -