High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

Ruo-Gu Huang, Douglas Tham, Dunwei Wang, James R. Heath

Research output: Contribution to journalArticlepeer-review

16 Scopus citations


We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.
Original languageEnglish (US)
Pages (from-to)1005-1012
Number of pages8
JournalNano Research
Issue number10
StatePublished - Jun 24 2011
Externally publishedYes

Bibliographical note

KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: The authors acknowledge H. Ahmad and Y. -S. Shin for graphics assistance. This work was funded by the National Science Foundation under Grant CCF-0541461 and the Department of Energy (DE-FG02-04ER46175). D. Tham gratefully acknowledges support by the KAUST Scholar Award.
This publication acknowledges KAUST support, but has no KAUST affiliated authors.


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