TY - JOUR
T1 - Harmonic rejection in current source inverter-based distributed generation with grid voltage distortion using multi-synchronous reference frame
AU - Morsy, Ahmed
AU - Ahmed, Shehab
AU - Massoud, Ahmed Mohamed
N1 - Generated from Scopus record by KAUST IRTS on 2019-11-27
PY - 2014/1/1
Y1 - 2014/1/1
N2 - The growing penetration of renewable energy resources and distributed generation (DG) has raised significant interest in power quality issues. Achieving low total harmonic distortion of exported current using low switching frequency inverters such as current source inverters (CSI) is a challenge, especially under conditions of severe utility voltage distortion. This study presents a control structure for a CSI-based DG system, based on a multi-synchronous reference frame (MSRF) architecture that rejects the effect of utility voltage distortion and helps attain high-quality output current. The proposed solution is applicable for low switching frequency inverters with limited passive filter bandwidth. The MSRF architecture presented confines two stages; one for harmonics extraction and another for harmonics rejection. A state-space-based stationary frame equivalent model of the proposed MSRF architecture is presented; this substantially reduces the computational load while preserving system performance. Experimental results validate the proposed technique against the conventional harmonic rejection controller.
AB - The growing penetration of renewable energy resources and distributed generation (DG) has raised significant interest in power quality issues. Achieving low total harmonic distortion of exported current using low switching frequency inverters such as current source inverters (CSI) is a challenge, especially under conditions of severe utility voltage distortion. This study presents a control structure for a CSI-based DG system, based on a multi-synchronous reference frame (MSRF) architecture that rejects the effect of utility voltage distortion and helps attain high-quality output current. The proposed solution is applicable for low switching frequency inverters with limited passive filter bandwidth. The MSRF architecture presented confines two stages; one for harmonics extraction and another for harmonics rejection. A state-space-based stationary frame equivalent model of the proposed MSRF architecture is presented; this substantially reduces the computational load while preserving system performance. Experimental results validate the proposed technique against the conventional harmonic rejection controller.
UR - http://www.crossref.org/iPage?doi=10.1049%2Fiet-pel.2013.0186
UR - http://www.scopus.com/inward/record.url?scp=84922697783&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2013.0186
DO - 10.1049/iet-pel.2013.0186
M3 - Article
SN - 1755-4543
VL - 7
JO - IET Power Electronics
JF - IET Power Electronics
IS - 6
ER -