Gate Stack Engineering in n-type (-201) β-Ga2O3Transistors

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Abstract

A systematic study of Al2O3 and SiO2/ Al2O3 dielectric on p-Ga2O3 is carried out including the effect of the forming gas annealing. Capacitance-voltage (C-V) curve of the Al2O3/Ga2O3 gate stack shows a large hysteresis and sweep-to-sweep C-V shift compared to SiO2/Al2O3/Ga2O3 case, which suggests SiO2 interlayer reduces the defect density in Al2O3/Ga2O3 gate stack. In addition, forming gas annealing further suppresses the interface and border traps density in both Al2O3/Ga2O3 and SiO2/ Al2O3/Ga2O3 gate stacks. A thin film transistor (TFT) with annealed SiO2/ Al2O3 dielectric has an on-off ratio of 106, a subthreshold swing (SS) of 0.75 V/decade, and a hysteresis width $(\mathrm{V}_{\text{Hy}})$ of 0.5 V compared to an on-off ratio of105, a SS of 1.2 V/decade, and a VHy of 2 V in the controlled TFT with unannealed Al2O3 dielectric. The increased on-off ratio by one order, reduced SS by > 400 mV/decade, and $\mathrm{V}_{\text{Hy}}$ by >1.5 V is attributed to decreased interface and border traps in annealed SiO2/ Al2O3 compared to unannealed Al2O3/Ga2O3 gate stack. Interface trap density is calculated by $\mathbf{V}_{\text{Hy}}$ of the transistor, which showed a five-time reduction in annealed SiO2/ Al2O3/Ga2O3 compared to the unannealed A;2O3/Ga2O3 gate stack. This study suggests that annealed SiO2/ Al2O3 dielectric stack is promising for $\boldsymbol{\upbeta}-\text{Ga}_2 \mathrm{O}_3$ transistors.

Original languageEnglish (US)
Title of host publication2022 IEEE International Conference on Emerging Electronics, ICEE 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665491853
DOIs
StatePublished - 2022
Event2022 IEEE International Conference on Emerging Electronics, ICEE 2022 - Bangalore, India
Duration: Dec 11 2022Dec 14 2022

Publication series

Name2022 IEEE International Conference on Emerging Electronics, ICEE 2022

Conference

Conference2022 IEEE International Conference on Emerging Electronics, ICEE 2022
Country/TerritoryIndia
CityBangalore
Period12/11/2212/14/22

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

Keywords

  • Border traps
  • Capacitance-Voltage
  • Dielectric stack
  • Forming Gas
  • Interface traps

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Surfaces, Coatings and Films
  • Instrumentation

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