Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

Muhammad Mustafa Hussain; Casey Eben Smith; Harlan Rusty Harris; Chadwin Young; Hsinghuang Tseng; Rajarao Jammy

doi:10.1109/TED.2009.2039097

Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

Muhammad Mustafa Hussain, Casey Eben Smith, Harlan Rusty Harris, Chadwin Young, Hsinghuang Tseng, Rajarao Jammy

Research output: Contribution to journal › Article › peer-review

26 Scopus citations

Abstract

Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

Original language	English (US)
Pages (from-to)	626-631
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	57
Issue number	3
DOIs	https://doi.org/10.1109/TED.2009.2039097
State	Published - Mar 2010

Bibliographical note

KAUST Repository Item: Exported on 2020-10-01

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/TED.2009.2039097

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title = "Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering",

abstract = "Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. {\textcopyright} 2006 IEEE.",

author = "Hussain, {Muhammad Mustafa} and Smith, {Casey Eben} and Harris, {Harlan Rusty} and Chadwin Young and Hsinghuang Tseng and Rajarao Jammy",

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year = "2010",

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doi = "10.1109/TED.2009.2039097",

language = "English (US)",

volume = "57",

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Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering. / Hussain, Muhammad Mustafa; Smith, Casey Eben; Harris, Harlan Rusty et al.
In: IEEE Transactions on Electron Devices, Vol. 57, No. 3, 03.2010, p. 626-631.

Research output: Contribution to journal › Article › peer-review

TY - JOUR

T1 - Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

AU - Hussain, Muhammad Mustafa

AU - Smith, Casey Eben

AU - Harris, Harlan Rusty

AU - Young, Chadwin

AU - Tseng, Hsinghuang

AU - Jammy, Rajarao

N1 - KAUST Repository Item: Exported on 2020-10-01

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AB - Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

UR - http://hdl.handle.net/10754/561454

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M3 - Article

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JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 3

ER -

Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

Abstract

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