Feature extraction without learning in an analog spatial pooler memristive-CMOS circuit design of hierarchical temporal memory

Computer Science

• Sparsity 100%
• Feature Extraction 100%
• Hardware Implementation 66%
• Initialization Stage 66%
• Assignment Weight 33%
• Face Recognition 33%
• Recognition Problem 33%
• Deterministic Approach 33%
• Input Information 33%

Engineering

• Circuit Design 100%
• Feature Extraction 100%
• Sparsity 100%
• Recognition Problem 33%
• Input Data 33%
• Input Information 33%

Keyphrases

• CMOS Circuit Design 100%
• Binary Pattern 14%