Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

Thanakorn Khamvilai; Louis Sutter; Jose M.Magalhaes Junior; Aqib A. Syed; Eric Feron

doi:10.1109/DASC43569.2019.9081703

Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

Thanakorn Khamvilai, Louis Sutter, Jose M.Magalhaes Junior, Aqib A. Syed, Eric Feron

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The development of multi-core processors has been providing benefits to many industries. However, some issues may arise among these benefits because of the potential conflicts between parallel applications. One of the important concerns is the reliability of the safety critical applications. This paper proposes two algorithms for computing a probability of failure of the safety-critical application on reconfigurable multi-core architecture. One is based on the exact analytical computation; whereas, the other one is the approximated of the former with less computational expensive. These algorithms adopts a combination of a fault tree analysis and a subgraph isomorphism problem to apply for avionics application. Their numerical results and performance analysis are also included.

Original language	English (US)
Title of host publication	AIAA/IEEE Digital Avionics Systems Conference - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Print)	9781728106496
DOIs	https://doi.org/10.1109/DASC43569.2019.9081703
State	Published - Sep 1 2019
Externally published	Yes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2021-02-18

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10.1109/DASC43569.2019.9081703

Cite this

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title = "Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture",

abstract = "The development of multi-core processors has been providing benefits to many industries. However, some issues may arise among these benefits because of the potential conflicts between parallel applications. One of the important concerns is the reliability of the safety critical applications. This paper proposes two algorithms for computing a probability of failure of the safety-critical application on reconfigurable multi-core architecture. One is based on the exact analytical computation; whereas, the other one is the approximated of the former with less computational expensive. These algorithms adopts a combination of a fault tree analysis and a subgraph isomorphism problem to apply for avionics application. Their numerical results and performance analysis are also included.",

author = "Thanakorn Khamvilai and Louis Sutter and Junior, {Jose M.Magalhaes} and Syed, {Aqib A.} and Eric Feron",

note = "Generated from Scopus record by KAUST IRTS on 2021-02-18",

year = "2019",

month = sep,

day = "1",

doi = "10.1109/DASC43569.2019.9081703",

language = "English (US)",

isbn = "9781728106496",

booktitle = "AIAA/IEEE Digital Avionics Systems Conference - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture. / Khamvilai, Thanakorn; Sutter, Louis; Junior, Jose M.Magalhaes et al.
AIAA/IEEE Digital Avionics Systems Conference - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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T1 - Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

AU - Khamvilai, Thanakorn

AU - Sutter, Louis

AU - Junior, Jose M.Magalhaes

AU - Syed, Aqib A.

AU - Feron, Eric

N1 - Generated from Scopus record by KAUST IRTS on 2021-02-18

PY - 2019/9/1

Y1 - 2019/9/1

N2 - The development of multi-core processors has been providing benefits to many industries. However, some issues may arise among these benefits because of the potential conflicts between parallel applications. One of the important concerns is the reliability of the safety critical applications. This paper proposes two algorithms for computing a probability of failure of the safety-critical application on reconfigurable multi-core architecture. One is based on the exact analytical computation; whereas, the other one is the approximated of the former with less computational expensive. These algorithms adopts a combination of a fault tree analysis and a subgraph isomorphism problem to apply for avionics application. Their numerical results and performance analysis are also included.

AB - The development of multi-core processors has been providing benefits to many industries. However, some issues may arise among these benefits because of the potential conflicts between parallel applications. One of the important concerns is the reliability of the safety critical applications. This paper proposes two algorithms for computing a probability of failure of the safety-critical application on reconfigurable multi-core architecture. One is based on the exact analytical computation; whereas, the other one is the approximated of the former with less computational expensive. These algorithms adopts a combination of a fault tree analysis and a subgraph isomorphism problem to apply for avionics application. Their numerical results and performance analysis are also included.

UR - https://ieeexplore.ieee.org/document/9081703/

UR - http://www.scopus.com/inward/record.url?scp=85084766377&partnerID=8YFLogxK

U2 - 10.1109/DASC43569.2019.9081703

DO - 10.1109/DASC43569.2019.9081703

M3 - Conference contribution

SN - 9781728106496

BT - AIAA/IEEE Digital Avionics Systems Conference - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

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