Abstract
Fractional-order capacitors are the core building blocks for implementing fractional-order circuits. Due to the absence of their commercial availability, they can be approximated through appropriately configured passive or active integer-order element topologies. Such a topology, constructed using Operational Transconductance Amplifiers (OTAs) and capacitors has been implemented in monolithic form through the AMS 0.35μm CMOS process, and the fabricated chips are employed here for the experimental evaluation of the behavior of networks constructed from fractional-order capacitors connected in series or in parallel.
Original language | English (US) |
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Pages (from-to) | 5-12 |
Number of pages | 8 |
Journal | AEU - International Journal of Electronics and Communications |
Volume | 74 |
DOIs | |
State | Published - Jan 28 2017 |
Bibliographical note
KAUST Repository Item: Exported on 2020-10-01Acknowledgements: This work was supported by Grant E.029 from the Research Committee of the University of Patras (Programme K. Karatheodori).