Experimental allocation of safety-critical applications on reconfigurable multi-core architecture

Louis Sutter, Thanakorn Khamvilai, Philippe Monmousseau, John B. Mains, Eric Feron, Philippe Baufreton, François Neumann, Madhava Krishna, S. K. Nandy, Ranjani Narayan, Chandan Haldar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

Multi-core processors pervade numerous industries but they still represent a challenge for the aerospace industry, where strong certification of every components is required. One way to make them enforce safety-criticality constraints is to ensure reallocation of critical tasks on the chip when they are affected by hardware faults. This paper describes and compares different models of a task reallocation problem for a reconfigurable multi-core architecture. It also presents the first version of the macroscopic model made of Raspberry Pi that was built to represent the multi-core architecture and to test the task allocation algorithm on an actual system, showing the increased robustness that the reallocation algorithm enables while cores are made faulty.
Original languageEnglish (US)
Title of host publicationAIAA/IEEE Digital Avionics Systems Conference - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781538641125
DOIs
StatePublished - Dec 7 2018
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2021-02-18

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