For the first time, we illustrate the importance of process sequence for LaOx capped HfSiON/metal gate on performance, variability, scaling, interface quality and reliability. La diffusion to the high-k/low-k interface controls Vt, as well as strongly affects mobility, Nit and BTI. La diffusion is limited to the Si surface by employing SiON interface layer (IL) mitigating the issues of La-induced mobility degradation and PBTI. Improved Vt tunability, reliability and performance are achieved with optimized process sequence, high-k thickness control, LaOx deposition and SiON (not SiO2) IL. Tinv=1.15nm and Vt,lin=0.31V was obtained while achieving the following attributes: mobility∼70%, N it <5×1010 cm-2, δV t<30mV within wafer, BTI δVt <40mV at 125o°C. By optimizing these gate stack factors, we have developed and demonstrated structures for 22nm node LOP application. P. D. Kirsch.