TY - GEN
T1 - Design and demonstration of micro-electro-mechanical relay multipliers
AU - Fariborzi, Hossein
AU - Chen, Fred
AU - Stojanović, Vladimir
AU - Nathanael, Rhesa
AU - Jeon, Jaeseok
AU - Liu, Tsu Jae King
PY - 2011
Y1 - 2011
N2 - This paper describes the micro-architecture and circuit techniques for building multipliers with micro-electromechanical (MEM) relays. By optimizing the circuits and micro-architecture to suit relay device characteristics, the performance of the relay based multiplier is improved by a factor of ∼8x over any known static CMOS-style implementation, and ∼4x over CMOS pass-gate equivalent implementations. A 16-bit relay multiplier is shown to offer ∼10x lower energy per operation at sub-10 MOPS throughputs when compared to an optimized CMOS multiplier at an equivalent 90 nm technology node. To demonstrate the viability of this technology, we experimentally demonstrate the operation of the primary multiplier building block: a full (7:3) compressor, built with 98 MEM-relays, which is the largest working MEM-relay circuit reported to date.
AB - This paper describes the micro-architecture and circuit techniques for building multipliers with micro-electromechanical (MEM) relays. By optimizing the circuits and micro-architecture to suit relay device characteristics, the performance of the relay based multiplier is improved by a factor of ∼8x over any known static CMOS-style implementation, and ∼4x over CMOS pass-gate equivalent implementations. A 16-bit relay multiplier is shown to offer ∼10x lower energy per operation at sub-10 MOPS throughputs when compared to an optimized CMOS multiplier at an equivalent 90 nm technology node. To demonstrate the viability of this technology, we experimentally demonstrate the operation of the primary multiplier building block: a full (7:3) compressor, built with 98 MEM-relays, which is the largest working MEM-relay circuit reported to date.
UR - http://www.scopus.com/inward/record.url?scp=84856330154&partnerID=8YFLogxK
U2 - 10.1109/ASSCC.2011.6123618
DO - 10.1109/ASSCC.2011.6123618
M3 - Conference contribution
AN - SCOPUS:84856330154
SN - 9781467303989
T3 - 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011
SP - 117
EP - 120
BT - 2011 Proceedings of Technical Papers
T2 - 7th IEEE Asian Solid-State Circuits Conference, A-SSCC 2011
Y2 - 14 November 2011 through 16 November 2011
ER -