Design and analysis of 2T-2M Ternary content addressable memories

Mohamed Bahloul; M. E. Fouda; Rawan Naous; Mohammed A. Zidan; A. M. Eltawil; F. Kurdahi; Khaled N. Salama

doi:10.1109/mwscas.2017.8053201

Design and analysis of 2T-2M Ternary content addressable memories

Mohamed Bahloul, M. E. Fouda, Rawan Naous, Mohammed A. Zidan, A. M. Eltawil, F. Kurdahi, Khaled N. Salama

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Scopus citations

Abstract

Associate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.

Original language	English (US)
Title of host publication	2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	1430-1433
Number of pages	4
ISBN (Print)	9781509063895
DOIs	https://doi.org/10.1109/mwscas.2017.8053201
State	Published - Oct 24 2017

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KAUST Repository Item: Exported on 2020-10-01

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10.1109/mwscas.2017.8053201

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Bahloul, M., Fouda, M. E., Naous, R., Zidan, M. A., Eltawil, A. M., Kurdahi, F., & Salama, K. N. (2017). Design and analysis of 2T-2M Ternary content addressable memories. In 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 1430-1433). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/mwscas.2017.8053201

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abstract = "Associate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.",

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AU - Bahloul, Mohamed

AU - Fouda, M. E.

AU - Naous, Rawan

AU - Zidan, Mohammed A.

AU - Eltawil, A. M.

AU - Kurdahi, F.

AU - Salama, Khaled N.

N1 - KAUST Repository Item: Exported on 2020-10-01

PY - 2017/10/24

Y1 - 2017/10/24

N2 - Associate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.

AB - Associate and approximate computing using resistive memory based Ternary Content Addressable Memory is becoming widely used. In this paper, a simplified model based analysis of a 2T2M-Ternary Content Addressable Memory using memristors is introduced. A comprehensive study is presented taking into consideration different circuit parameters and parasitic effects. Parameters such as the memristor Rh/Rl ratio, transistor technology, operating frequency, and memory width are taken into consideration. The proposed model is verified with SPICE showing a high degree of matching between theory and simulation. The utility of the model is established using a design example.

UR - http://hdl.handle.net/10754/626785

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M3 - Conference contribution

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BT - 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)

PB - Institute of Electrical and Electronics Engineers (IEEE)

ER -

Design and analysis of 2T-2M Ternary content addressable memories

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