Challenges in dual workfunction metal gate CMOS integration

Byoung Hun Lee*, Seungchul Song, Muhammad Hussain, Raj Jammy

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Technical challenges for various integration schemes including gate first dual metal process, fully silicided gate and replacement gate are discussed. Implementation of dual workfunction metal gate CMOS integration is feasible, but needs more systematic reliability assessment. copyright The Electrochemical Society.

Original languageEnglish (US)
Title of host publicationAdvanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 2
Subtitle of host publicationNew Materials, Processes, and Equipment
PublisherElectrochemical Society Inc.
Pages263-274
Number of pages12
Edition2
ISBN (Electronic)1566775027
DOIs
StatePublished - 2006
Externally publishedYes
EventAdvanced Gate Stack, Source/Drain, and Channel Engineering fo Si-Based CMOS 2: New Materials, Processes, and Equipment - 210th Electrochemical Society Meeting - Cancun, Mexico
Duration: Oct 29 2006Nov 3 2006

Publication series

NameECS Transactions
Number2
Volume3
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherAdvanced Gate Stack, Source/Drain, and Channel Engineering fo Si-Based CMOS 2: New Materials, Processes, and Equipment - 210th Electrochemical Society Meeting
Country/TerritoryMexico
CityCancun
Period10/29/0611/3/06

ASJC Scopus subject areas

  • General Engineering

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