Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability

P. D. Kirsch; M. A. Quevedo-Lopez; S. A. Krishnan; C. Krug; Husam Niman Alshareef; C. S. Park; R. Harris; N. Moumen; A. Neugroschel; G. Bersuker; B. H. Lee; J. G. Wang; G. Pant; B. E. Gnade; M. J. Kim; R. M. Wallace; J. S. Jur; D. J. Lichtenwalner; A. I. Kingon; R. Jammy

doi:10.1109/IEDM.2006.346862

Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability

P. D. Kirsch, M. A. Quevedo-Lopez, S. A. Krishnan, C. Krug, Husam Niman Alshareef, C. S. Park, R. Harris, N. Moumen, A. Neugroschel, G. Bersuker, B. H. Lee, J. G. Wang, G. Pant, B. E. Gnade, M. J. Kim, R. M. Wallace, J. S. Jur, D. J. Lichtenwalner, A. I. Kingon, R. Jammy

Physical Sciences and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

18 Scopus citations

Abstract

We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V _T=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T _inv=1.3nm) and 83% SiO₂ mobility. Key enablers of this result are 1) La doped HfSiON for n-FET V_T tuning 2) HfO ₂:SiO₂ alloy ratio with 10% SiO₂ suppressing crystallization up to 1070°C, 3) interlayer SiO₂ (IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI trade-off, while matching the V_T of a SiO₂/n-PolySi control.

Original language	English (US)
Title of host publication	2006 International Electron Devices Meeting Technical Digest, IEDM
DOIs	https://doi.org/10.1109/IEDM.2006.346862
State	Published - Dec 1 2006
Event	2006 International Electron Devices Meeting, IEDM - San Francisco, CA, United States Duration: Dec 10 2006 → Dec 13 2006

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Other

Other	2006 International Electron Devices Meeting, IEDM
Country/Territory	United States
City	San Francisco, CA
Period	12/10/06 → 12/13/06

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1109/IEDM.2006.346862

Cite this

Kirsch, P. D., Quevedo-Lopez, M. A., Krishnan, S. A., Krug, C., Alshareef, H. N., Park, C. S., Harris, R., Moumen, N., Neugroschel, A., Bersuker, G., Lee, B. H., Wang, J. G., Pant, G., Gnade, B. E., Kim, M. J., Wallace, R. M., Jur, J. S., Lichtenwalner, D. J., Kingon, A. I., & Jammy, R. (2006). Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability. In 2006 International Electron Devices Meeting Technical Digest, IEDM [4154281] (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2006.346862

@inproceedings{74ea01be27be4643b1742c6ef50fd3c9,

title = "Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability",

abstract = "We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V T=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T inv=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON for n-FET VT tuning 2) HfO 2:SiO2 alloy ratio with 10% SiO2 suppressing crystallization up to 1070°C, 3) interlayer SiO2 (IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI trade-off, while matching the VT of a SiO2/n-PolySi control.",

author = "Kirsch, {P. D.} and Quevedo-Lopez, {M. A.} and Krishnan, {S. A.} and C. Krug and Alshareef, {Husam Niman} and Park, {C. S.} and R. Harris and N. Moumen and A. Neugroschel and G. Bersuker and Lee, {B. H.} and Wang, {J. G.} and G. Pant and Gnade, {B. E.} and Kim, {M. J.} and Wallace, {R. M.} and Jur, {J. S.} and Lichtenwalner, {D. J.} and Kingon, {A. I.} and R. Jammy",

year = "2006",

month = dec,

day = "1",

doi = "10.1109/IEDM.2006.346862",

language = "English (US)",

isbn = "1424404398",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

booktitle = "2006 International Electron Devices Meeting Technical Digest, IEDM",

note = "2006 International Electron Devices Meeting, IEDM ; Conference date: 10-12-2006 Through 13-12-2006",

}

Kirsch, PD, Quevedo-Lopez, MA, Krishnan, SA, Krug, C, Alshareef, HN, Park, CS, Harris, R, Moumen, N, Neugroschel, A, Bersuker, G, Lee, BH, Wang, JG, Pant, G, Gnade, BE, Kim, MJ, Wallace, RM, Jur, JS, Lichtenwalner, DJ, Kingon, AI & Jammy, R 2006, Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability. in 2006 International Electron Devices Meeting Technical Digest, IEDM., 4154281, Technical Digest - International Electron Devices Meeting, IEDM, 2006 International Electron Devices Meeting, IEDM, San Francisco, CA, United States, 12/10/06. https://doi.org/10.1109/IEDM.2006.346862

Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability. / Kirsch, P. D.; Quevedo-Lopez, M. A.; Krishnan, S. A. et al.

2006 International Electron Devices Meeting Technical Digest, IEDM. 2006. 4154281 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability

AU - Kirsch, P. D.

AU - Quevedo-Lopez, M. A.

AU - Krishnan, S. A.

AU - Krug, C.

AU - Alshareef, Husam Niman

AU - Park, C. S.

AU - Harris, R.

AU - Moumen, N.

AU - Neugroschel, A.

AU - Bersuker, G.

AU - Lee, B. H.

AU - Wang, J. G.

AU - Pant, G.

AU - Gnade, B. E.

AU - Kim, M. J.

AU - Wallace, R. M.

AU - Jur, J. S.

AU - Lichtenwalner, D. J.

AU - Kingon, A. I.

AU - Jammy, R.

PY - 2006/12/1

Y1 - 2006/12/1

N2 - We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V T=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T inv=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON for n-FET VT tuning 2) HfO 2:SiO2 alloy ratio with 10% SiO2 suppressing crystallization up to 1070°C, 3) interlayer SiO2 (IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI trade-off, while matching the VT of a SiO2/n-PolySi control.

AB - We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V T=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T inv=1.3nm) and 83% SiO2 mobility. Key enablers of this result are 1) La doped HfSiON for n-FET VT tuning 2) HfO 2:SiO2 alloy ratio with 10% SiO2 suppressing crystallization up to 1070°C, 3) interlayer SiO2 (IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI trade-off, while matching the VT of a SiO2/n-PolySi control.

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U2 - 10.1109/IEDM.2006.346862

DO - 10.1109/IEDM.2006.346862

M3 - Conference contribution

AN - SCOPUS:46049102429

SN - 1424404398

SN - 9781424404391

T3 - Technical Digest - International Electron Devices Meeting, IEDM

BT - 2006 International Electron Devices Meeting Technical Digest, IEDM

T2 - 2006 International Electron Devices Meeting, IEDM

Y2 - 10 December 2006 through 13 December 2006

ER -

Kirsch PD, Quevedo-Lopez MA, Krishnan SA, Krug C, Alshareef HN, Park CS et al. Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability. In 2006 International Electron Devices Meeting Technical Digest, IEDM. 2006. 4154281. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2006.346862

Band edge n-MOSFETs with high-k/metal gate stacks scaled to EOT=0.9nm with excellent carrier mobility and high temperature stability

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