Avoiding leakage and synchronization attacks through enclave-side preemption control

Marcus Völp, Adam Lackorzynski, Jérémie Decouchant, Vincent Rahli, Francisco Rocha, Paulo Esteves-Verissimo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations


Intel SGX is the latest processor architecture promising secure code execution despite large, complex and hence potentially vulnerable legacy operating systems (OSs). However, two recent works identiffed vulnerabilities that allow an untrusted management OS to extract secret information from Intel SGX's enclaves, and to violate their integrity by exploiting concurrency bugs. In this work, we re-investigate delayed preemption (DP) in the context of Intel SGX. DP is a mechanism originally proposed for L4-family microkernels as disable-interrupt replacement. Recapitulating earlier results on language-based information-ow security, we illustrate the construction of leakage-free code for enclaves. However, as long as adversaries have fine-grained control over preemption timing, these solutions are impractical from a performance/complexity perspective. To overcome this, we resort to delayed preemption, and sketch a software implementation for hypervisors providing enclaves as well as a hardware extension for systems like SGX. Finally, we illustrate how static analyses for SGX may be extended to check confidentiality of preemption-delaying programs.
Original languageEnglish (US)
Title of host publicationSysTEX 2016 - 1st Workshop on System Software for Trusted Execution, colocated with ACM/IFIP/USENIX Middleware 2016
PublisherAssociation for Computing Machinery, [email protected]
ISBN (Print)9781450346702
StatePublished - Dec 12 2016
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2021-03-16


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