A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip

Ahmed A. Eltawil; Michael Engel; Bibiche Geuskens; Amin Khajeh Djahromi; Fadi J. Kurdahi; Peter Marwedel; Smail Niar; Mazen A.R. Saghir

doi:10.1016/j.micpro.2013.07.008

A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip

Ahmed A. Eltawil, Michael Engel, Bibiche Geuskens, Amin Khajeh Djahromi, Fadi J. Kurdahi, Peter Marwedel, Smail Niar, Mazen A.R. Saghir

Research output: Contribution to journal › Article › peer-review

6 Scopus citations

Abstract

As systems-on-chip increase in complexity, the underlying technology presents us with significant challenges due to increased power consumption as well as decreased reliability. Today, designers must consider building systems that achieve the requisite functionality and performance using components that may be unreliable. In order to do so, it is crucial to understand the close interplay between the different layers of a system: technology, platform, and application. This will enable the most general tradeoff exploration, reaping the most benefits in power, performance and reliability. This paper surveys various cross layer techniques and approaches for power, performance, and reliability tradeoffs are technology, circuit, architecture and application layers. © 2013 Elsevier B.V. All rights reserved.

Original language	English (US)
Journal	Microprocessors and Microsystems
Volume	37
Issue number	8 PARTA
DOIs	https://doi.org/10.1016/j.micpro.2013.07.008
State	Published - Jan 1 2013
Externally published	Yes

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abstract = "As systems-on-chip increase in complexity, the underlying technology presents us with significant challenges due to increased power consumption as well as decreased reliability. Today, designers must consider building systems that achieve the requisite functionality and performance using components that may be unreliable. In order to do so, it is crucial to understand the close interplay between the different layers of a system: technology, platform, and application. This will enable the most general tradeoff exploration, reaping the most benefits in power, performance and reliability. This paper surveys various cross layer techniques and approaches for power, performance, and reliability tradeoffs are technology, circuit, architecture and application layers. {\textcopyright} 2013 Elsevier B.V. All rights reserved.",

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AU - Eltawil, Ahmed A.

AU - Engel, Michael

AU - Geuskens, Bibiche

AU - Djahromi, Amin Khajeh

AU - Kurdahi, Fadi J.

AU - Marwedel, Peter

AU - Niar, Smail

AU - Saghir, Mazen A.R.

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AB - As systems-on-chip increase in complexity, the underlying technology presents us with significant challenges due to increased power consumption as well as decreased reliability. Today, designers must consider building systems that achieve the requisite functionality and performance using components that may be unreliable. In order to do so, it is crucial to understand the close interplay between the different layers of a system: technology, platform, and application. This will enable the most general tradeoff exploration, reaping the most benefits in power, performance and reliability. This paper surveys various cross layer techniques and approaches for power, performance, and reliability tradeoffs are technology, circuit, architecture and application layers. © 2013 Elsevier B.V. All rights reserved.

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JF - Microprocessors and Microsystems

IS - 8 PARTA

ER -

A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip

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