TY - GEN
T1 - A spread spectrum clock generator based on a short-term optimized chaotic map
AU - Pareschi, Fabio
AU - Setti, Gianluca
AU - Rovatti, Riccardo
AU - Frattini, Giovanni
N1 - Generated from Scopus record by KAUST IRTS on 2023-02-15
PY - 2011/1/1
Y1 - 2011/1/1
N2 - We present a spread spectrum clock generator for EMI reduction, where the modulating signal is generated by a suitably designed chaotic map. With respect to past solutions, the map has been designed to achieve a specific short-term behavior of the generated sequences, which allows to optimize the electromagnetic interference peak reduction not only for the theoretical spectrum, but also in the measurement setting prescibed by CISPR norms. In the latter case, we are able to achieve a 3.8dB improvement in EMI reduction with respect to the triangular modulation when using the peak detector, which increases to 6.9 dB when switching to the quasi-peak detector. Results are measured on a prototype which has been designed and fabricated in a 0.18 μm CMOS technology. © 2011 IEEE.
AB - We present a spread spectrum clock generator for EMI reduction, where the modulating signal is generated by a suitably designed chaotic map. With respect to past solutions, the map has been designed to achieve a specific short-term behavior of the generated sequences, which allows to optimize the electromagnetic interference peak reduction not only for the theoretical spectrum, but also in the measurement setting prescibed by CISPR norms. In the latter case, we are able to achieve a 3.8dB improvement in EMI reduction with respect to the triangular modulation when using the peak detector, which increases to 6.9 dB when switching to the quasi-peak detector. Results are measured on a prototype which has been designed and fabricated in a 0.18 μm CMOS technology. © 2011 IEEE.
UR - http://ieeexplore.ieee.org/document/6044933/
UR - http://www.scopus.com/inward/record.url?scp=82955194821&partnerID=8YFLogxK
U2 - 10.1109/ESSCIRC.2011.6044933
DO - 10.1109/ESSCIRC.2011.6044933
M3 - Conference contribution
SN - 9781457707018
SP - 507
EP - 510
BT - European Solid-State Circuits Conference
PB - IEEE Computer [email protected]
ER -