A simple compressive sensing algorithm for parallel many-core architectures

Alexandre Borghi; Jérôme Darbon; Sylvain Peyronnet; Tony F. Chan; Stanley Osher

doi:10.1007/s11265-012-0671-9

A simple compressive sensing algorithm for parallel many-core architectures

Alexandre Borghi, Jérôme Darbon^*, Sylvain Peyronnet, Tony F. Chan, Stanley Osher

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

17 Scopus citations

Abstract

In this paper we consider the l ¹-compressive sensing problem. We propose an algorithm specifically designed to take advantage of shared memory, vectorized, parallel and many-core microprocessors such as the Cell processor, new generation Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Besides its implementation is easy. We also give evidence of the efficiency of our approach and compare the algorithm on the three platforms, thus exhibiting pros and cons for each of them.

Original language	English (US)
Pages (from-to)	1-20
Number of pages	20
Journal	Journal of Signal Processing Systems
Volume	71
Issue number	1
DOIs	https://doi.org/10.1007/s11265-012-0671-9
State	Published - Apr 2013
Externally published	Yes

Bibliographical note

Funding Information:
Acknowledgements The research of A. Borghi on this work has been done while being at the mathematics department of UCLA and being supported by the ONR grant N000140710810. The research of J. Darbon and S. Osher was supported by ONR grant N000140710810. The research of T. Chan was supported by DMS-0610079 and ONR N00014-06-1-0345. This works has been supported in part by French National Research Agency (ANR) through COSINUS program project (MIDAS no. ANR-09-COSI-009).

Keywords

Compressed sensing
Optimization algorithm
Parallel architecture
Vectorized architecture

ASJC Scopus subject areas

Control and Systems Engineering
Theoretical Computer Science
Signal Processing
Information Systems
Modeling and Simulation
Hardware and Architecture

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10.1007/s11265-012-0671-9

Cite this

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abstract = "In this paper we consider the l 1-compressive sensing problem. We propose an algorithm specifically designed to take advantage of shared memory, vectorized, parallel and many-core microprocessors such as the Cell processor, new generation Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Besides its implementation is easy. We also give evidence of the efficiency of our approach and compare the algorithm on the three platforms, thus exhibiting pros and cons for each of them.",

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note = "Funding Information: Acknowledgements The research of A. Borghi on this work has been done while being at the mathematics department of UCLA and being supported by the ONR grant N000140710810. The research of J. Darbon and S. Osher was supported by ONR grant N000140710810. The research of T. Chan was supported by DMS-0610079 and ONR N00014-06-1-0345. This works has been supported in part by French National Research Agency (ANR) through COSINUS program project (MIDAS no. ANR-09-COSI-009).",

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doi = "10.1007/s11265-012-0671-9",

language = "English (US)",

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AU - Borghi, Alexandre

AU - Darbon, Jérôme

AU - Peyronnet, Sylvain

AU - Chan, Tony F.

AU - Osher, Stanley

N1 - Funding Information: Acknowledgements The research of A. Borghi on this work has been done while being at the mathematics department of UCLA and being supported by the ONR grant N000140710810. The research of J. Darbon and S. Osher was supported by ONR grant N000140710810. The research of T. Chan was supported by DMS-0610079 and ONR N00014-06-1-0345. This works has been supported in part by French National Research Agency (ANR) through COSINUS program project (MIDAS no. ANR-09-COSI-009).

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KW - Compressed sensing

KW - Optimization algorithm

KW - Parallel architecture

KW - Vectorized architecture

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A simple compressive sensing algorithm for parallel many-core architectures

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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