A Self-Adaptive LSE Wirelength Model for VLSI Global Placement

Zhiping Lai; Zhipeng Huang; Zhen Chen; Jianli Chen

doi:10.1109/ICSICT.2018.8564925

A Self-Adaptive LSE Wirelength Model for VLSI Global Placement

Zhiping Lai, Zhipeng Huang, Zhen Chen, Jianli Chen

Chemical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Ignoring some cells overlaps, the common objective of very large scale integration (VLSI) global placement problem is to minimize the total half-perimeter wirelength (IIPWL). Due to the non-differentiability of HPWL, the differentiable log-sum- exponential (LSK) wirelength model has been widely used to approximate IIPWL. In order to overcome the disadvantage of fixed parameter value in LSK, a self-adaptive LSK wirelength model has been presented in this paper. In each iteration of cells diffusion, the proposed wirelength model is dynamically updated according to the overflow of the circuit, and then a self-adaptive wirelength based nonlinear solver is used to solve the placement problem. Compared with a state-of-the-art LSE based placer, the experimental results show that our wirelength model not only can improve the solution quality, but also can reduce the runtime.

Original language	English (US)
Title of host publication	2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
Editors	Ting-Ao Tang, Fan Ye, Yu-Long Jiang
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538644409
DOIs	https://doi.org/10.1109/ICSICT.2018.8564925
State	Published - Dec 5 2018
Event	14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Qingdao, China Duration: Oct 31 2018 → Nov 3 2018

Publication series

Name	2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings

Conference

Conference	14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018
Country/Territory	China
City	Qingdao
Period	10/31/18 → 11/3/18

Bibliographical note

Publisher Copyright:
© 2018 IEEE.

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ICSICT.2018.8564925

Cite this

Lai, Z., Huang, Z., Chen, Z., & Chen, J. (2018). A Self-Adaptive LSE Wirelength Model for VLSI Global Placement. In T.-A. Tang, F. Ye, & Y.-L. Jiang (Eds.), 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings Article 8564925 (2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSICT.2018.8564925

Lai, Zhiping ; Huang, Zhipeng ; Chen, Zhen et al. / A Self-Adaptive LSE Wirelength Model for VLSI Global Placement. 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings. editor / Ting-Ao Tang ; Fan Ye ; Yu-Long Jiang. Institute of Electrical and Electronics Engineers Inc., 2018. (2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings).

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title = "A Self-Adaptive LSE Wirelength Model for VLSI Global Placement",

abstract = "Ignoring some cells overlaps, the common objective of very large scale integration (VLSI) global placement problem is to minimize the total half-perimeter wirelength (IIPWL). Due to the non-differentiability of HPWL, the differentiable log-sum- exponential (LSK) wirelength model has been widely used to approximate IIPWL. In order to overcome the disadvantage of fixed parameter value in LSK, a self-adaptive LSK wirelength model has been presented in this paper. In each iteration of cells diffusion, the proposed wirelength model is dynamically updated according to the overflow of the circuit, and then a self-adaptive wirelength based nonlinear solver is used to solve the placement problem. Compared with a state-of-the-art LSE based placer, the experimental results show that our wirelength model not only can improve the solution quality, but also can reduce the runtime.",

author = "Zhiping Lai and Zhipeng Huang and Zhen Chen and Jianli Chen",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 ; Conference date: 31-10-2018 Through 03-11-2018",

year = "2018",

month = dec,

day = "5",

doi = "10.1109/ICSICT.2018.8564925",

language = "English (US)",

series = "2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings",

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Lai, Z, Huang, Z, Chen, Z & Chen, J 2018, A Self-Adaptive LSE Wirelength Model for VLSI Global Placement. in T-A Tang, F Ye & Y-L Jiang (eds), 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings., 8564925, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018, Qingdao, China, 10/31/18. https://doi.org/10.1109/ICSICT.2018.8564925

A Self-Adaptive LSE Wirelength Model for VLSI Global Placement. / Lai, Zhiping; Huang, Zhipeng; Chen, Zhen et al.
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings. ed. / Ting-Ao Tang; Fan Ye; Yu-Long Jiang. Institute of Electrical and Electronics Engineers Inc., 2018. 8564925 (2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Huang, Zhipeng

AU - Chen, Zhen

AU - Chen, Jianli

PY - 2018/12/5

Y1 - 2018/12/5

N2 - Ignoring some cells overlaps, the common objective of very large scale integration (VLSI) global placement problem is to minimize the total half-perimeter wirelength (IIPWL). Due to the non-differentiability of HPWL, the differentiable log-sum- exponential (LSK) wirelength model has been widely used to approximate IIPWL. In order to overcome the disadvantage of fixed parameter value in LSK, a self-adaptive LSK wirelength model has been presented in this paper. In each iteration of cells diffusion, the proposed wirelength model is dynamically updated according to the overflow of the circuit, and then a self-adaptive wirelength based nonlinear solver is used to solve the placement problem. Compared with a state-of-the-art LSE based placer, the experimental results show that our wirelength model not only can improve the solution quality, but also can reduce the runtime.

AB - Ignoring some cells overlaps, the common objective of very large scale integration (VLSI) global placement problem is to minimize the total half-perimeter wirelength (IIPWL). Due to the non-differentiability of HPWL, the differentiable log-sum- exponential (LSK) wirelength model has been widely used to approximate IIPWL. In order to overcome the disadvantage of fixed parameter value in LSK, a self-adaptive LSK wirelength model has been presented in this paper. In each iteration of cells diffusion, the proposed wirelength model is dynamically updated according to the overflow of the circuit, and then a self-adaptive wirelength based nonlinear solver is used to solve the placement problem. Compared with a state-of-the-art LSE based placer, the experimental results show that our wirelength model not only can improve the solution quality, but also can reduce the runtime.

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Lai Z, Huang Z, Chen Z, Chen J. A Self-Adaptive LSE Wirelength Model for VLSI Global Placement. In Tang TA, Ye F, Jiang YL, editors, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2018. 8564925. (2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings). doi: 10.1109/ICSICT.2018.8564925

A Self-Adaptive LSE Wirelength Model for VLSI Global Placement

Abstract

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ASJC Scopus subject areas

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