A random demodulator with a software-based integrator resetting scheme

Vikas Singal, Yehia Massoud

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations


The random demodulator architecture is a compressive sensing based receiver that allows the reconstruction of frequency-sparse signals from measurements acquired at a rate below the signal's Nyquist rate. This in turn results in tremendous power savings in receivers because of the direct correlation between the power consumption of analog-to-digital converters (ADCs) in communication receivers and the sampling rate at which these ADCs operate. In this paper, we propose a random demodulator with a software-based integrator resetting scheme that does not use a switch to reset the integrator as in the conventional random demodulator system, but rather modifies the random signal so that the integrator is reset by zeroing the input. We show that the proposed system is equivalent to the conventional random demodulator, but is more practical to implement because of the many artifacts presented by switches. © 2011 IEEE.
Original languageEnglish (US)
Title of host publication2011 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011
Number of pages4
StatePublished - Dec 1 2011
Externally publishedYes

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Generated from Scopus record by KAUST IRTS on 2022-09-13


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