A low-power DS-CDMA RAKE receiver utilizing resource allocation techniques

Engineering

• Combiner 100%
• Front End 100%
• Application Specific Integrated Circuit 100%
• Channel Estimation 50%
• Electric Power Utilization 50%
• Matched Filter 50%
• Digital Frequency 50%
• Recovery Loop 50%
• Interface Microcontroller 50%
• Frequency Synthesis 50%
• Supports 50%
• Sampling Rate 50%
• Demodulation 50%

Computer Science

• Resource Allocation 100%
• Application Specific Integrated Circuit 100%
• Power Consumption 50%
• Wireless Channel 50%
• System Resource 50%
• Sampling Rate 50%
• Synthesis Technique 50%
• Channel Estimation 50%
• Innovation Implementation 50%
• Equivalent Gate 50%
• maximal ratio combining 50%
• Microcontroller 50%
• Digital Frequency 50%

Keyphrases

• Tagged Data 20%
• Front-end Processors 20%
• Highly Configurable 20%
• Layout Area 20%
• Modular Expansion 20%
• Design Reuse 20%
• Load Scenarios 20%
• Microcontroller Interfacing 20%
• Processing Engine 20%