A low-power 12-bit 20 ms/s asynchronously controlled sar adc for wave its sensor based applications

Khuram Shehzad, Deeksha Verma, Danial Khan, Qurat Ul Ain, Muhammad Basim, Sung Jin Kim, Behnam Samadpoor Rikan, Young Gun Pu, Keum Cheol Hwang, Youngoo Yang, Kang Yoon Lee

Research output: Contribution to journalArticlepeer-review

9 Scopus citations


A low power 12-bit, 20 MS/s asynchronously controlled successive approximation register (SAR) analog-to-digital converter (ADC) to be used in wireless access for vehicular environment (WAVE) intelligent transportation system (ITS) sensor based application is presented in this paper. To optimize the architecture with respect to power consumption and performance, several techniques are proposed. A switching method which employs the common mode charge recovery (CMCR) switching process is presented for capacitive digital-to-analog converter (CDAC) part to lower the switching energy. The switching technique proposed in our work consumes 56.3% less energy in comparison with conventional CMCR switching method. For high speed operation with low power consumption and to overcome the kick back issue in the comparator part, a mutated dynamic-latch comparator with cascode is implemented. In addition, to optimize the flexibility relating to the performance of logic part, an asynchronous topology is employed. The structure is fabricated in 65 nm CMOS process technology with an active area of 0.14 mm2. With a sampling frequency of 20 MS/s, the proposed architecture attains signal-to-noise distortion ratio (SNDR) of 65.44 dB at Nyquist frequency while consuming only 472.2 µW with 1 V power supply.
Original languageEnglish (US)
Issue number7
StatePublished - Apr 1 2021
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2023-09-23

ASJC Scopus subject areas

  • Biochemistry
  • Atomic and Molecular Physics, and Optics
  • Analytical Chemistry
  • Electrical and Electronic Engineering


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