A High-level Implementation Framework for Non-Recurrent Artificial Neural Networks on FPGA

Luciano Prono, Alex Marchioni, Mauro Mangia, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations


This paper presents a fully parametrized framework, entirely described in VHDL, to simplify the FPGA implementation of non-recurrent Artificial Neural Networks (ANNs), which works independently of the complexity of the networks in terms of number of neurons, layers and, to some extent, overall topology. More specifically, the network may consist of fully-connected, max-pooling or convolutional layers which can be arbitrarily combined. The ANN is used only for inference, while back-propagation is performed off-line during the ANN learning phase. Target of this work is to achieve fast-prototyping, small, low-power and cost-effective implementation of ANNs to be employed directly on the sensing nodes of IOT (i.e. Edge Computing). The performance of so-implemented ANNs is assessed for two real applications, namely hand movement recognition based on electromyographic signals and handwritten character recognition. Energy per operation is measured in the FPGA realization and compared with the corresponding ANN implemented on a microcontroller (μC) to demonstrate the advantage of the FPGA based solution.
Original languageEnglish (US)
Title of host publicationPRIME 2019 - 15th Conference on Ph.D. Research in Microelectronics and Electronics, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Print)9781728135496
StatePublished - Jul 1 2019
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2023-02-15


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