A Hardware-based Framework for Secure Firmware Updates on Embedded Systems

Solon Falas; Charalambos Konstantinou; Maria K. Michael

doi:10.1109/VLSI-SoC.2019.8920348

A Hardware-based Framework for Secure Firmware Updates on Embedded Systems

Solon Falas, Charalambos Konstantinou, Maria K. Michael

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

9 Scopus citations

Abstract

The ability to update firmware in embedded systems allows end-users to patch device vulnerabilities and improve functionality. However, this process is often exploited by adversaries in order to inject malicious firmware code into embedded devices. In this paper, we present a framework which enables highly secure and fast firmware update delivery with minimal downtime on embedded devices. The proposed framework utilizes device intrinsic physical characteristics to authenticate firmware packages along with integrated cryptographic modules to ensure the firmware confidentiality and integrity. A proof-of-concept design is implemented on FPGA, which demonstrates high performance with reasonable overheads, while our analysis shows strong security guarantees.

Original language	English (US)
Title of host publication	IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
Publisher	IEEE Computer [email protected]
Pages	198-203
Number of pages	6
ISBN (Print)	9781728139159
DOIs	https://doi.org/10.1109/VLSI-SoC.2019.8920348
State	Published - Oct 1 2019
Externally published	Yes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2022-09-13

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10.1109/VLSI-SoC.2019.8920348

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title = "A Hardware-based Framework for Secure Firmware Updates on Embedded Systems",

abstract = "The ability to update firmware in embedded systems allows end-users to patch device vulnerabilities and improve functionality. However, this process is often exploited by adversaries in order to inject malicious firmware code into embedded devices. In this paper, we present a framework which enables highly secure and fast firmware update delivery with minimal downtime on embedded devices. The proposed framework utilizes device intrinsic physical characteristics to authenticate firmware packages along with integrated cryptographic modules to ensure the firmware confidentiality and integrity. A proof-of-concept design is implemented on FPGA, which demonstrates high performance with reasonable overheads, while our analysis shows strong security guarantees.",

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doi = "10.1109/VLSI-SoC.2019.8920348",

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AU - Falas, Solon

AU - Konstantinou, Charalambos

AU - Michael, Maria K.

N1 - Generated from Scopus record by KAUST IRTS on 2022-09-13

PY - 2019/10/1

Y1 - 2019/10/1

N2 - The ability to update firmware in embedded systems allows end-users to patch device vulnerabilities and improve functionality. However, this process is often exploited by adversaries in order to inject malicious firmware code into embedded devices. In this paper, we present a framework which enables highly secure and fast firmware update delivery with minimal downtime on embedded devices. The proposed framework utilizes device intrinsic physical characteristics to authenticate firmware packages along with integrated cryptographic modules to ensure the firmware confidentiality and integrity. A proof-of-concept design is implemented on FPGA, which demonstrates high performance with reasonable overheads, while our analysis shows strong security guarantees.

AB - The ability to update firmware in embedded systems allows end-users to patch device vulnerabilities and improve functionality. However, this process is often exploited by adversaries in order to inject malicious firmware code into embedded devices. In this paper, we present a framework which enables highly secure and fast firmware update delivery with minimal downtime on embedded devices. The proposed framework utilizes device intrinsic physical characteristics to authenticate firmware packages along with integrated cryptographic modules to ensure the firmware confidentiality and integrity. A proof-of-concept design is implemented on FPGA, which demonstrates high performance with reasonable overheads, while our analysis shows strong security guarantees.

UR - https://ieeexplore.ieee.org/document/8920348/

UR - http://www.scopus.com/inward/record.url?scp=85076806106&partnerID=8YFLogxK

U2 - 10.1109/VLSI-SoC.2019.8920348

DO - 10.1109/VLSI-SoC.2019.8920348

M3 - Conference contribution

SN - 9781728139159

SP - 198

EP - 203

BT - IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC

PB - IEEE Computer [email protected]

ER -

A Hardware-based Framework for Secure Firmware Updates on Embedded Systems

Abstract

Bibliographical note

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