A fully CMOS true random number generator based on hidden attractor hyperchaotic system

Ngoc Nguyen, Georges Kaddoum, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

Low-power devices used in Internet-of-things networks have been short of security due to the high power consumption of random number generators. This paper presents a low-power hyperchaos-based true random number generator, which is highly recommended for secure communications. The proposed system, which is based on a four-dimensional chaotic system with hidden attractors and oscillators, exhibits rich dynamics. Numerical analysis is provided to verify the dynamic characteristics of the proposed system. A fully customized circuit is deployed using 130 nm CMOS technology to enable integration into low-power devices. Four output signals are used to seed a SHIFT-XOR-based chaotic data post-processing to generate random bit output. The chip prototype was simulated and tested at 100 MHz sampling frequency. The hyperchaotic circuit consumes a maximum of 980 μ W in generating chaotic signals while dissipates a static current of 623 μ A. Moreover, the proposed system provides ready-to-use binary random bit sequences which have passed the well-known statistical randomness test suite NIST SP800-22. The proposed novel system design and its circuit implementation provide a best energy efficiency of 4.37 pJ/b at a maximum sampling frequency of 100 MHz.
Original languageEnglish (US)
Pages (from-to)2887-2904
Number of pages18
JournalNonlinear Dynamics
Volume102
Issue number4
DOIs
StatePublished - Dec 1 2020
Externally publishedYes

Bibliographical note

Generated from Scopus record by KAUST IRTS on 2023-02-15

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